Power MOSFETs (metal-oxide-semiconductor field-effect transistors) comprise one of the most useful field effect transistors implemented in both analog and digital circuit applications as energy saving switches.
In general, a trench-based power MOSFET is built using a vertical structure as opposed to a planar structure. The vertical structure enables the transistor to sustain both high blocking voltage and high current. Similarly, with a vertical structure, the component area and active device density are roughly proportional to the current it can sustain as a device “on” characteristics, and the silicon drift component thickness is proportional to the breakdown voltage as a device “off” characteristics. One the most obvious advantages for trench based power MOSFET device is its lower on-resistance (Rdson) with low reverse leakage current.
As one of the key applications in DC-DC conversion, a power MOSFET device has another advantage when being used as a synchronized rectifier transistor with its p-n body diode in a free-wheeling mode. The use of p-n body diode in conventional power MOSFET plays the role of reverse voltage blocking. However, the reverse recovery from the p-n body diode in the free wheeling mode contributes adversely to the total switching efficiency in DC-DC conversion.
Generally, there are two well-known solutions to reduce reverse recovery effect: 1) using external Schottky device to be co-packaged with power MOSFET; or 2) integrating a lumped Schottky diode in MOSFET to bypass the parasitic body diode as a monolithic approach. Besides those two methods, historically carrier-lifetime-control techniques are employed such as using electron or proton irradiation. These techniques have proven successful in reducing the reverse recovery charge Qrr of the body diode.
However, all these solutions have their own drawbacks. For instance, the external Schottky approach can lead to high inductance, thus leading to less total switching efficiency improvement. On the other hand, a monolithically integrated Schottky approach compromises silicon real estate usage for on-resistance reduction because of certain percentage of silicon area has to be allocated to Schottky integration, and the small area of the integrated Schottky also limits current capability and the forward voltage lowing advantage. The irradiation approach can lead to significant changes in threshold voltage, leakage current and breakdown voltage due to the damage induced by irradiations. From process and product complexity point of view, all these solutions are not economically sound because extra process steps need to be added, such as adding more mask layers in fabricating the devices.
In 2003, Cheng et al. (Xu Cheng, Johnny K. Sin, Baowei Kang, Chuguang Feng, Yu Wu and Xingming Liu, IEEE Transactions on electron devices, Vol. 50, No. 5, (2003). P1422) published a novel device structure to achieve fast reverse recovery body diode using cell-distributed Schottky contacts in high voltage VDMOSFET. Experimental results show a 50% decrease in the reverse recovery charge and increase in the softness factor of the body diode. Both structures are designed for making “intrinsic” Schottky diodes in every active cell. In other words, the Schottky diode and active MOSFET share the same pitch. Due to the process control concern, adding Schottky diode in every active cell limits the possibility for further pitch shrink opportunity, which is the critical direction for reducing on-resistance for power device in low voltage application. This approach provides obvious advantage in high voltage DMOS device (e.g. >500V), which is not sensitive to pitch reduction for lowering Rdson (because of most of on-resistance component is from drift area for high voltage applications). However, in low voltage applications, pitch reduction should not be limited by adding a Schottky device in the active cell. Otherwise, on-resistance becomes high by increasing the pitch. The challenge is how to integrate a Schottky diode in a power device without impacting on-resistance for low voltage device applications.
Baliga et al (Tsengyou Syan, Prasd Venkatraman and B. J. Baliga, IEEE Trans. On Electron Devices, Vol. 41 No. 5 (1994), P800) once proposed accumulation field effect transistor (ACCUFET) as an ultra-low on-resistance vertical channel power device in the mid of 1990s. Since then, several similar device structures have been published. However, high reverse leakage current is the most problematic drawback. It is very hard to achieve “normally-off” characteristics when the gate is grounded. For an n-channel device when an n type gate is used, a negative gate bias is needed to turn-off the device to achieve acceptable reverse voltage blocking. One possible improvement solution is to reduce pitch using deep submicron lithography. However, one major device characteristic different from conventional power MOSFET should not be ignored when ACCUFET is used as power switching device: its bi-directional switching nature shows that the reverse and forward blocking are only kept in a finite duration because of the accumulation of minority carriers, which make the depletion width narrower. This effect limits the effectiveness of blocking capability. As a modified ACCUFET structure proposed by Yoshinori Konishi (U.S. Pat. No. 5,844,273), a p-n diode can be formed in the no body channel region. The direct connection between this p type to N+ source can help to reduce reverse leakage, however, the low on-resistance and low forward voltage advantages were not achieved.